Asynch MPU

Matrix Systems hosts a Asynch China program initiated in 2005 by a government sponsored technology development program under Beijing Municipal Commission of Science and Technology. The program was collaborated among (1) Caltech (Pasadena, California, USA) Asynchronous VLIS Group, led by Prof. Alan Martin and executed on-site in Beijing by Dr. Mika Nystrom; (2) design and implementation by Tsinghua University Institute of Microelectronics, led by Prof. Chen Hongyi, lecturer Dr. Chen Hong and her team of 6 graduate students; (3) Common design technology provided by XH Microelectronics Technology, Ltd. (now Collective Electronics, Ltd., Beijing, China), a local Semiconductor IP (SIP) startup led founded by Jin Luo (who was a graduate student and staff researcher at Caltech in 1980’s). Asynch China achieve design and prototype of a 8-bit micro-controller fully event-driven and asynchronous in operation, which delivers super-low power consumption and very quiet (no clock noise) operation. As an SIP suitable to embedded applications for medical implant applications.

The world’s first Asynchronous MiniMIPS 32-bit Microprocessor IC-processor-MIPSinvented and prototyped in 1989 By Caltech Asynchronous VLAI Group led by Prof. Alan Martin: